Intel, Other Chip Makers Slow Shift to New Technology

Intel, Other Chip Makers Slow Shift to New Technology

DON CLARK

March 12, 2014 7:29 p.m. ET

Computer-chip makers and their suppliers have been laying the groundwork for one of their most sweeping technological advances in years. But some big players have developed jitters about the required investment, and appear to be hitting the brakes.

The long-debated shift to fabricating chips on larger silicon wafers is the latest cycle in a transition the industry has repeated every decade or so to reduce the cost of producing each chip.

To realize these savings, companies have to make massive upfront outlays for plants and equipment. The latest change could boost the cost of a single high-volume factory to as much as $10 billion from around $4 billion, industry executives say.

Amid questions about the future strength of chip demand and how development costs will be shared, some companies have been reining in their investments, raising fears the equipment needed to produce the new chips might be delayed for a year or more.

ASML Holding ASML.AE +0.40% NV, a maker of key machines used to define features on chips, recently said it had “paused” development of gear designed to work with the larger wafers. Intel Corp.INTC +0.12% , the largest chip manufacturer by volume, said it has slowed some payments to the Netherlands-based company under a deal to help develop the technology.

The move to larger wafers “has definitely been pushed out from a timing standpoint,” said Gary Dickerson, chief executive of Applied Materials Inc., AMAT +1.99% a big maker of semiconductor-manufacturing tools based in Santa Clara, Calif.

He said one of his company’s large customers, which he didn’t identify, told Applied that it wouldn’t make the wafer shift by the end of the decade.

Chip makers have generally been reluctant to specify when they might roll out the new technology. But, in public meetings, industry executives have set 2016 as a target to assemble the needed production gear.

Jonathan Davis, global vice president of advocacy for the equipment trade group SEMI, said 2018 is emerging as a new target. “I think you could say the schedule has relaxed,” he said.

The status of the new technology was the focus of a gathering Wednesday in Albany, N.Y., at the headquarters of an industry consortium whose participants include Intel, Taiwan Semiconductor Manufacturing Co. 2330.TW -0.88% , Samsung Electronics Co.005930.SE +1.16% , International Business Machines Corp. IBM -0.29% and Globalfoundries Inc.

Silicon wafers are an important variable in the industry’s continuing quest to reduce the cost of chips, helping make it possible to add new capabilities to computers, mobile phones and other electronic products. Following a pattern known as Moore’s Law, named for Intel’s co-founder, companies also race to shrink the size of transistors on chips to increase their speed, cost and data-storage capacity.

Larger wafers can produce more chips at a time, in much the way a larger cookie sheet can bake a larger batch of cookies. Historically, each advance in wafers has reduced the cost of each chip by around 30%, industry executives say.

Failing to move up to the next wafer size could undermine the industry’s traditional business model, said G. Dan Hutcheson, an analyst at VLSI Research. On the other hand, he puts equipment-development costs for the next wafer size at $14 billion, and says there is no guarantee of achieving meaningful cost savings per chip.

“Everyone knows it’s going to be incredibly expensive and incredibly risky,” Mr. Hutcheson said. “There is no way to predict if it really will deliver the cost benefits.”

Chip makers made their last transition about a dozen years ago, introducing wafers that were 300 millimeters, or about 12 inches, in diameter, about the size of a dinner plate. The next proposed shift would enlarge them to 450 millimeters, or roughly the size of a large pizza pan.

Wafer transitions often trigger tensions among chip makers and with the companies that sell them production tools, over issues that include how development costs are shared. SEMI estimates that equipment makers spent about $12 billion on the last shift, with many questioning whether they recouped that investment.

This time, companies hope to save money by doing more to standardize new tools and manufacturing techniques. That goal led to the creation in 2011 of the five-company G450C consortium, in a partnership with the State University of New York’s College of Nanoscale Science and Engineering in Albany. Some of the first 450-millimeter tools are being tested in a new building there.

“The collaboration is some of the best I’ve seen,” said Adrian Maynes, program director for an affiliated organization called F450C andwho works for M + W Group, a builder of semiconductor factories.

But some chip manufacturers have been hesitant to make financial commitments, said VLSI Research’s Mr. Hutcheson. ASML, without naming specific customers, has complained about a lack of “alignment” among them.

“Customers call the shots and, as a supplier, we follow the customer,” an ASML spokesman said. “In the absence of alignment, execution of ASML’s 450-millimeter program has been paused.”

ASML’s moves are closely watched because it supplies lithography tools needed to define circuit patterns on chips, and it has led to development of a long-awaited successor to existing technology called EUV. In 2012 Samsung, TSMC and Intel all invested in the company.

Intel’s $4.1 billion investment included about $680 million to support ASML’s 450-millimeter tool development. Chuck Mulloy, an Intel spokesman, said Intel is “adjusting” the flow of payments to ASML under that program.

The Silicon Valley giant, which in 2013 committed $2 billion to a factory building designed for 450-millimeter equipment, has lately has been grappling with a slowdown in spending on personal computers that use its chips. It recently said it is holding off outfitting another new factory in Arizona.

Intel also is concerned that it might wind up bearing too much of the cost of the 450-millimeter transition.

“We still believe 450 is the right thing to do,” Mr. Mulloy said, estimating that the company will roll out the technology by the end of the decade. “But we have been clear: we will not do it ourselves.”

 

Unknown's avatarAbout bambooinnovator
Kee Koon Boon (“KB”) is the co-founder and director of HERO Investment Management which provides specialized fund management and investment advisory services to the ARCHEA Asia HERO Innovators Fund (www.heroinnovator.com), the only Asian SMID-cap tech-focused fund in the industry. KB is an internationally featured investor rooted in the principles of value investing for over a decade as a fund manager and analyst in the Asian capital markets who started his career at a boutique hedge fund in Singapore where he was with the firm since 2002 and was also part of the core investment committee in significantly outperforming the index in the 10-year-plus-old flagship Asian fund. He was also the portfolio manager for Asia-Pacific equities at Korea’s largest mutual fund company. Prior to setting up the H.E.R.O. Innovators Fund, KB was the Chief Investment Officer & CEO of a Singapore Registered Fund Management Company (RFMC) where he is responsible for listed Asian equity investments. KB had taught accounting at the Singapore Management University (SMU) as a faculty member and also pioneered the 15-week course on Accounting Fraud in Asia as an official module at SMU. KB remains grateful and honored to be invited by Singapore’s financial regulator Monetary Authority of Singapore (MAS) to present to their top management team about implementing a world’s first fact-based forward-looking fraud detection framework to bring about benefits for the capital markets in Singapore and for the public and investment community. KB also served the community in sharing his insights in writing articles about value investing and corporate governance in the media that include Business Times, Straits Times, Jakarta Post, Manual of Ideas, Investopedia, TedXWallStreet. He had also presented in top investment, banking and finance conferences in America, Italy, Sydney, Cape Town, HK, China. He has trained CEOs, entrepreneurs, CFOs, management executives in business strategy & business model innovation in Singapore, HK and China.

2 Responses to Intel, Other Chip Makers Slow Shift to New Technology

  1. Howdy! Would you mind iff I share your blog with my twitter group?
    There’s a lot of pesople that I thik would really
    enhoy your content. Pllease let me know. Thank you

Leave a reply to bambooinnovator Cancel reply